1. Field of the Invention
The present invention relates to a finite impulse response filter, and more particularly, to a finite impulse response filter and its filtering method for reducing the ROM capacity needed to store multiple filter state values.
2. Description of the Related Art
A representative filter for use in a digital signal processing system is a finite impulse response (hereinafter referred to as FIR) filter. As compared with a filter consisting of passive elements such as resistor R, inductor L and capacitor C, the FIR filter exhibits a relatively superior performance, which is currently used in most digital signal processing systems. FIR filtering is divided into two mode, or types, a tapped delay line mode and lookup table mode according to its structure and manner.
A configuration of an FIR filter in accordance with the tapped delay line mode, which performs filtering by convolution has filter input data is applied to a shift register, this filter input data forms N input data lines. Multipliers respectively multiply the N bit input data by N filter coefficient values which may be stored in a storage device. Then, an adder or plural adders sum the outputs of the multipliers and outputs the result as filter output data.
The FIR filter of tapped delay line mode is the most widely used. When FIR filtering is implemented in a parallel processing method, however, N multipliers and N-1 adders are required, thus undesirably increasing hardware size. Meanwhile, even when FIR filtering is implemented in a serial processing method, N multiplication steps and N-1 adding steps must be performed while one bit of input data is applied, requiring high-speed hardware implementation. Examples of known tapped delay line FIR filters, incorporated herein by reference, are: U.S. Pat. No. 5,404,322, by Mark Gehring and entitled Digital Filter And Method Of Design; and U.S. Pat. No. 5,381,357, by Janet Wedgwood, et al., entitled Complex Adaptive FIR Filter.
In a configuration of an FIR filter in accordance with the lookup table mode, filter output values corresponding to N input combinations are previously calculated and stored in a lookup table, such as a ROM. Here, as each bit of data is applied to an input shift register, the current filter input data forms N input data lines. An address generator generates addresses in response to the N bit input data. Corresponding to the generated addresses, the filter output value stored in the lookup table is output as filter output data. Such a filtering mode does not use multipliers and requires no high-speed hardware in implementing a filter. However, this mode is disadvantageous because the capacity of the ROM necessarily increases when the number of taps of the filter increases. Examples of FIR filters using ROMs to store calculated filter output values, incorporated herein by reference, are: U.S. Pat. No. 5,487,084, by Kouei Misaizu, et al., entitled Nyquist Filter For Digital Modulation; U.S. Pat. No. 5,379,242, by Dennis Rose, et al., entitled ROM Filter; U.S. Pat. No. 5,374,931, by Alan Wiener, entitled Radar Target Velocity Extimator; U.S. Pat. No. 5,313,412, by Yoshihiro Nukui, entitled Oversampling Type Finite Impulse Response Filter; and U.S. Pat. No. 5,027,306, by Jon Dattorro, et al., entitled Decimation Filter As For A Sigma-Delta Analog-To-Digital Converter.